Subject: RE: Test program for literal signedness
From: Tom Fitzpatrick (fitz@co-design.com)
Date: Tue Jul 30 2002 - 13:50:26 PDT
Hi All,
In Systemsim, the answer is:
test literal is unsigned
which is the same as if the "'0" were replaced with "'b0", which is defined
to be unsigned.
Thanks for the example Steve. Very clever.
-t
> -----Original Message-----
> From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org]On
> Behalf Of Steven Sharp
> Sent: Wednesday, July 24, 2002 4:03 PM
> To: sv-bc@server.eda.org
> Subject: Test program for literal signedness
>
>
> module top;
> reg [1:0] rs, ru, rt;
> initial
> begin
> rs = 1'sb1 | 1'sb0;
> ru = 1'sb1 | 1'b0;
> rt = 1'sb1 | '0;
> if (rs !== 2'b11 || ru !== 2'b01)
> $display("signed arithmetic broken!");
> if (rt === rs)
> $display("test literal is signed");
> else if (rt === ru)
> $display("test literal is unsigned");
> else
> $display("test literal is broken");
> end
> endmodule
>
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Tom Fitzpatrick
Director of Technical Marketing
Co-Design Automation, Inc.
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