SystemVerilog Committee Meeting At Synopsys - September 17


Subject: SystemVerilog Committee Meeting At Synopsys - September 17
From: Vassilios.Gerousis@Infineon.Com
Date: Sat Aug 31 2002 - 03:12:46 PDT


Hello Dear SV committee,
        Since I heard only one objection on the date, I need to fix it and
move on. People need to make travel plans ASAP for cheaper tickets.

1- The Date of Our Meeting Is September 17.
2- Host is Synopsys: I will send you directions as soon as I get them.
3- Time: 9:30 AM until 5:00 PM.
4- No conference call will be provided.
5- Current Agenda (will be finalized by the end of next week).
Morning Session
        a- SV organization.
        b- SV policy and procedure.
        c- One slide review by SV Chairs (SV-AC, SV-BC (To Be Announced
Soon), SV-CC, and SV-EC).
        d- Synchronization among the four committees.
        e- LRM discussions and process..
        f- Enhancement/BC List and owners.
        g- Milestones and Plans for SV 3.1 standardization.
        h- Activities at Conferences.

Afternoon Session
        a- Presentation of SV donations:
                - TESTBENCH.
                - OVA.
                - C and API INTERFACE.
        b- Discussions on the donations:
                - SV members feedback and suggestions.
                - Reviews.
                - Areas of concerns.
        c- Action items and conclusions.
                - Decisions by the SV committees.

6- RSVP: Please Respond if you want to attend. Badges will be prepared in
advanced. Also seating is limited. First come, First In.

Best Regards

Vassilios



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