Subject: Re: always_comb semantics
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Fri Oct 04 2002 - 14:09:41 PDT
> From: "Michael McNamara" <mac@verisity.com>
>
> Gordon Vreugdenhil writes:
> >
> > It is certainly uncomputable whether a variable is always set.
> > That is one of the reasons I didn't bring up that aspect
> > (Superlog, btw, does require that). SystemVerilog, correctly,
> > doesn't require checks for this.
> >
> > Gord.
>
> Now how is this?
>
> One simply creates a surrounding synthetic context which sets the
> variable, and then evaluates the reaching definition for each node in
> the graph, and if the synthetic definition is never in the set of
> reaching definitions of any use, then you have proven the variable is
> always set before being used.
>
> You will end up with a conservative definition : you will be correct
> for every variable that you state will be set before being used;
> however some variables that you say _could_ be used before being set,
> will in truth never suffer this fate, because proving that every
> possible path through a flow graph could be taken is an uncomputable
> problem.
>
> [See pp 610 of Compilers, Princples & Techniques]
>
> -mac
This is reminding me of Douglas R. Hofstadter's "Godel, Escher, Bach: an
Eternal Golden Braid",
which I slogged through many years ago. The upshot of Godel's theorem is
that from within the
system there always some things you are not going to know - this appears
to be one of them.
http://www.forum2.org/tal/books/geb.html
My concern with the @(*) and similar syntax is that lazy engineers will
over-use it and simulations
will suddenly start going slower for no apparent reason. While @(*) may
not be too hard to debug
"always_comb" is pulling in dependencies from functions that could be
using data shared by many
modules. I think we should narrow the automatic sensitivity to (say)
items in the calling module's
scope, otherwise it becomes hard to implement and potentially very
ineffecient.
Kev.
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