Subject: Re: "static" proposal
From: Steven Sharp (sharp@cadence.com)
Date: Thu Nov 07 2002 - 11:03:50 PST
>I have not. I was assuming that we would present it at the next
>SystemVerilog full committee meeting
>in December.
If you think that is the best approach. It is just difficult for me
to put any effort into the SV-BC work when I don't know whether our
decisions will be summarily dismissed.
> FYI. Even if we try to delete it, the keyword is apparently
>coming back through one
>of the donations......
The donations should be modified to be compatible with the Verilog
language before being added to it. I thought that was part of
the process.
Steven Sharp
sharp@cadence.com
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