Subject: [sv-bc] For loop step assignment bc19-34, bc19-65
From: Dave Rich (David.Rich@synopsys.com)
Date: Fri Jan 17 2003 - 09:10:28 PST
It seems that the 3.1 LRM in section 8.4.2 is enhancing the for loop
step assignment to allow compound statement. We should pass this issue
on to the sv-ec to complete the BNF for this statement.
-- -- Dave Rich Principal Engineer, CAE, VTG Tel: 650-584-4026 Cell: 510-589-2625 DaveR@Synopsys.com
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