[sv-bc] PROPOSAL: Reconciliation of SystemVerilog BNF with 8 recent Verilog errata fixes

Subject: [sv-bc] PROPOSAL: Reconciliation of SystemVerilog BNF with 8 recent Verilog errata fixes
From: Brad Pierce (Brad.Pierce@synopsys.com)
Date: Mon Oct 06 2003 - 17:04:44 PDT

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Attached is a proposal that reconciles the SystemVerilog BNF
with some recent Verilog BNF fixes.

-- Brad

• text/html attachment: BNF_reconciliation2.htm

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