Subject: [sv-bc] RE: [sv-ec] list of some errata, remarks, questions, and proposals
From: David W. Smith (david.smith@synopsys.com)
Date: Fri Oct 17 2003 - 15:01:03 PDT
Hi Thomas,
Here are the SV-EC responses to the questions you raised. Thank you for your
effort in helping us make SystemVerilog the best language we possibly can.
Regards
David
David W. Smith
Synopsys Scientist
Synopsys, Inc.
Synopsys Technology Park
2025 NW Cornelius Pass Road
Hillsboro, OR 97124
Voice: 503.547.6467
Main: 503.547.6000
FAX: 503.547.6906
Email: david.smith@synopsys.com
http://www.synopsys.com
-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Thomas.Kruse@Infineon.Com
Sent: Thursday, September 04, 2003 6:47 AM
To: sv-ec@eda.org; sv_bc@eda.org; sv_ac@eda.org
Cc: Vassilios.Gerousis@Infineon.Com; Wolfgang.Ecker@Infineon.Com;
david.smith@Synopsys.COM
Subject: [sv-ec] list of some errata, remarks, questions, and proposals
Hi everybody,
please find attached a list with some errata, remarks, questions, and
proposals about SV3.1. I think at least some of the detected issues
are fundamental.
David, could you please add the errata to the official list?
Thanks and best regards
Thomas
> Thomas Kruse
> Infineon Technologies AG
>
> Corporate Logic
> Design Automation
> Balanstr. 73
> 81541 Munich
>
> * Phone: +49 (0)89 234 46380
> * Fax: +49 (0)89 234 955 6601
> * Email: mailto:thomas.kruse@infineon.com
>
>
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