Subject: Re: [sv-bc] Need help on "library file_path syntax"
From: Steven Sharp (sharp@cadence.com)
Date: Fri Oct 31 2003 - 08:36:21 PST
I believe that SV is allowing library mapping to be specified in the Verilog
source. And since Verilog source can have comments, that leads to this
problem.
I think that allowing library mapping in the Verilog source is going in the
wrong direction. The IEEE VSG is considering going the other direction, and
only allowing configs in the lib.map file, not the Verilog source.
Steven Sharp
sharp@cadence.com
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