Subject: [sv-bc] LRM-222
From: Dave Rich (David.Rich@synopsys.com)
Date: Wed Feb 18 2004 - 12:53:19 PST
*bit** *[99:0] b = {>>{ a, b, c }}; // OK: b is padded with 4 bits
should be
*bit** *[99:0] _d_ = {>>{ a, b, c }}; // OK: _d_ is padded with 4 bits
-- -- David.Rich@Synopsys.com Technical Marketing Consultant and/or Principal Product Engineer http://www.SystemVerilog.org tele: 650-584-4026 cell: 510-589-2625
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