Mantis 1984

P1800-2008/D4

22.2.2.3 says "For input and inout ports, if the port kind is omitted, then the port shall default to a net of net type wire." So, e.g., "input int" is illegal since nets can't be 2-state types or reals.

In 22.2.2.3, CHANGE

module mh1 (input int in1, input shortreal in2, output tagged_st out);

TO

module mh1 (input var int in1, input var shortreal in2, output tagged_st out);

CHANGE

module mh3 (input byte a, b);

TO

module mh3 (input var byte a, b);

In 22.10, CHANGE

interface range (input clk, enable, input int minval, expr);

TO

interface range (input clk, enable, input var int minval, expr);

ALSO:

The LRM has about 28 cases of "input bit" in module/program/interface declarations. The editor should change each of them to either "input var bit" or "input logic".