Subject: Re: [sv-ec] FW: VPI in Perl..
From: Shalom.Bresticker@motorola.com
Date: Sat Dec 28 2002 - 08:42:07 PST
I have seen a few ways to integrate Perl into Verilog,
one or two inside Motorola and one or two outside.
Shalom
On Sat, 28 Dec 2002 Vassilios.Gerousis@Infineon.Com wrote:
> Date: Sat, 28 Dec 2002 16:18:02 +0100
> From: Vassilios.Gerousis@Infineon.Com
> To: sv-ec@eda.org, sv-cc@eda.org
> Subject: [sv-ec] FW: VPI in Perl..
>
> FYI
>
>
> -----Original Message-----
> From: Raghuraman R [mailto:raghu@ti.com]
> Sent: Saturday, December 28, 2002 11:23 AM
> To: gabe@server.eda.org
> Subject: VPI in Perl..
>
>
> Hi,
>
> I am Raghu from Texas Instruments. I would like to know if there is any
> effort to integrate Perl with Verilog. Currently, the 1364 standard
> allows only C functions to be integrated with Verilog (VPI). Since, the
> simulators nowadays are available in many platforms, not to the various
> architectures (linux in hpux, linux in intel, solaris, unix, windows
> etc.), the designers have to recompile for the various target machines
> and platforms. This could be a pain and also unnecessary. One way to
> overcome is for Verilog to allow Perl sub routines (on the lines of the
> C functions). Perl being OS independent should make things simpler for
> the designer and also it enables rapid application development.
>
> Let me know if there is an existing mechanism to do this or a current
> effort on this front. Thanks in advance.
>
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