Subject: RE: [sv-ec] Handling of escaped identifiers.
From: David W. Smith (david.smith@synopsys.com)
Date: Fri Apr 11 2003 - 11:39:56 PDT
Hello Regds,
Thanks for sending the issue. This appears to me to be a problem in the
1364-2001 standard. As such it should probably be sent to the errata
committee of the IEEE. The goal of SystemVerilog is not to fix all of the
open issues with 1364 but to add significant new capability to the language.
While there have been some effort on the VPI and VCD (mostly in SV-BC and
SV-CC) I do not believe this issue was addressed.
Regards
David
-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Raghuraman R
Sent: Friday, April 11, 2003 1:59 AM
To: sv-ec@eda.org
Subject: [sv-ec] Handling of escaped identifiers.
Hi,
We are facing issues because the Verilog standard is not clear on the
handling of escaped identifiers and the eda tool vendors are having
different interpretations.
Particular problem is that while the VPI call fetches the signal name
prefixed with the escaped identifer, while dumping the VCD for example,
the signal name is not printed with the escape character.
I had already raised this issue and the response was that the standard
is not clear enough. I would like to know whether there is any move to
clarify the standard's position on the escaped identifier.
Thanks.
-- Regds,Raghuraman R ASIC Texas Instruments (India) Ltd. Phone : +91-80-5099113 http://www.india.ti.com/~raghu
* Think. *
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