Subject: Re: [sv-ec] Clarification of INSIDE operator
From: Arturo Salz (Arturo.Salz@synopsys.com)
Date: Wed Nov 19 2003 - 13:20:48 PST
MessageRay,
My comments in purple below.
Arturo
----- Original Message -----
From: Ryan, Ray
To: 'sv-ec@server.eda.org'
Sent: Tuesday, November 18, 2003 2:45 PM
Subject: [sv-ec] Clarification of INSIDE operator
The description for the new 'inside' operator (LRM-16) defines 'range_list_or_array' as below:
inside_expression ::= expression inside range_list_or_array
range_list_or_array ::=
variable_identifier
| { value_range { , value_range } }
range_list_or_array is a comma-separated list of integral expressions and ranges. Value ranges are specified in ascending order with a low and high bound, enclosed by square braces [ ], and separated by a colon ( : ), as in [low_bound:high_bound]. Ranges include all of the integer elements between the bounds. If the bound to the left of the colon is greater than the bound to the right the range is empty and contains no values.
The text only covers the range_list part and not the array part. It should be something like:
The set membership (range_list_or_array) is defined by a comma-separated list of integral expressions and ranges or an array of integral elements (variable_identifier). Value ranges are specified in ascending order with a low and high bound, enclosed by square braces [ ], and separated by a colon ( : ), as in [low_bound:high_bound]. Ranges include all of the integer elements between the bounds. If the bound to the left of the colon is greater than the bound to the right the range is empty and contains no values. Each element of an array is included in the set."
[Arturo] Your changes do clarify the meaning, but I think your generalization below is even better.
Is the array restricted to be a single dimensioned array?
[Arturo] One dimension was certainly the intent.
I think allowing multi-dimensional arrays will require additional rules to determine how the array is used. For example:
bit [10:1] a [20:1] ;
Does "x inside a" mean each 10 bit value, or each individual bit. The more packed dimensions, the more complex.
Also:
Why can't the array reference be a hierarchical reference, or a slice? Why not allow the membership
set to be defined by an array and a range, or multiple arrays? It would be more general to define the
set membership as below:
Change:
inside_expression ::= expression inside range_list_or_array
range_list_or_array ::=
variable_identifier
| { value_range { , value_range } }
value_range ::=
expression
| [ expression : expression ]
To:
inside_expression ::= expression inside set_membership
set_membership ::=
expression_or_range
| { expression_or_range { , expression_or_range} }
expression_or_range ::=
expression
| [ expression : expression ]
Notes: a) if an expression references an array, each element of the array in included in the set.
b) the { } syntax is not needed - set membership could be a simple list.
[Arturo] Allowing set_membership to include any number of (one dimensional) arrays or expressions is a very nice generalization to the semantics of this operator. I propose that we vote this enhancement in. However, I don't like the syntactic change (removing the braces), for a number of reasons:
1) It would make the inside operator inconsistent with the dist operator (essentially set membership with distribution).
2) Most statements in verilog include some sort of delineation around the various operand, not just a semicolon.
For example, task calls don't need parenthesis: foo( a, b, c ); instead of foo a, b, c;
3) Unpacked array expressins also use braces, and set_membership is a certainly a form of unpacked array expression.
I believe the syntax is just:
inside_expression ::= expression inside range_list_or_array
range_list_or_array ::= { value_range { , value_range } }
And a sematic restiction that limits value range to either simple values or one-dimensional arrays.
Regards
Ray Ryan
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