[sv-ec] Fwd: SystemVerilog feature request - Multiple Interface / Multiple Inheritance

From: Clifford E. Cummings <cliffc_at_.....>
Date: Mon Dec 04 2006 - 16:03:47 PST
Hi, All -

Do we have an SVDB Mantis item for multiple inheritance? And is this 
the same or is this slightly different?

Regards - Cliff

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>Subject: SystemVerilog feature request
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>From: Paul Butler <paul.butler@ni.com>
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>Cliff,
>
>At DVCon 2006, I mentioned to you that I think SystemVerilog could benefit
>from a Java style interface.  The interface I'm thinking of is an abstract
>class with the exception that a class can implement multiple interfaces
>(similar to multiple inheritance).
>
>An example interface might be "cloneable" (implements a method which
>returns a deep copy of 'this').  I could create a container class that
>could contain objects of any class that implements "cloneable".  A
>"comparable" interface (implements a method to compare 'this' to another
>object) would allow me to build an ordered container for any class that is
>both "cloneable" and "comparable".
>
>Mentor Graphics' AVM cookbook has some good examples of how such an
>interface would be used:
>http://www.mentor.com/products/fv/_3b715c/cb_dll.cfm
>
>Paul Butler
>
>Paul.Butler@ni.com
>National Instruments
>Austin, TX

----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
Expert Verilog, SystemVerilog, Synthesis and Verification Training
Received on Mon Dec 4 16:03:57 2006

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