[sv-ec] Re: DAC Presentation of SV-2012 Enhancements - Cliff requests your input

From: Clifford E. Cummings <cliffc@sunburst-design.com>
Date: Fri May 31 2013 - 16:36:34 PDT
Agreed! I already had it on one of the opening slides!

Regards - Cliff

On 5/31/2013 2:33 PM, Rich, Dave wrote:
>
> Hi Cliff,
>
> I totally forgot -- the absolute very best enhancement to the IEEE 
> SystemVerilog LRM is that it is available at no charge 
> <http://go.mentor.com/get-1800>.
>
> Dave
>
> Mentor Graphics**
>
> *From:* owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] *On Behalf Of 
> *Rich, Dave
> *Sent:* Wednesday, May 29, 2013 3:04 PM
> *To:* Brad Pierce; Bresticker, Shalom; sv-ac@eda.org; sv-bc@eda.org; 
> sv-cc@eda.org; sv-ec@eda.org; sv-dc@eda.org; IEEE P1800 Working Group 
> (ieee1800@eda.org)
> *Cc:* Cliff Cummings
> *Subject:* [sv-ec] RE: DAC Presentation of SV-2012 Enhancements - 
> Cliff requests your input
>
> Hi Cliff,
>
> I also wrote an article about some of my favorite enhancements to 
> 1800-2012: http://go.mentor.com/ready-for-systemverilog-2012
>
> In that article have a link to the 225 issues 
> <http://tinyurl.com/1800-2012-changelog> addressed by the new LRM. But 
> my favorite thing out of that list is that only 35 are enhancements 
> <http://tinyurl.com/pokxxrx>. That is a testament to the stability 
> users have demanded from their verification environment.
>
> Dave
>
> Mentor Graphics**
>
> *From:* owner-sv-ec@eda.org <mailto:owner-sv-ec@eda.org> 
> [mailto:owner-sv-ec@eda.org] *On Behalf Of *Brad Pierce
> *Sent:* Wednesday, May 29, 2013 11:26 AM
> *To:* Bresticker, Shalom; sv-ac@eda.org <mailto:sv-ac@eda.org>; 
> sv-bc@eda.org <mailto:sv-bc@eda.org>; sv-cc@eda.org 
> <mailto:sv-cc@eda.org>; sv-ec@eda.org <mailto:sv-ec@eda.org>; 
> sv-dc@eda.org <mailto:sv-dc@eda.org>; IEEE P1800 Working Group 
> (ieee1800@eda.org <mailto:ieee1800@eda.org>)
> *Cc:* Cliff Cummings
> *Subject:* [sv-ec] RE: DAC Presentation of SV-2012 Enhancements - 
> Cliff requests your input
>
> Hi Cliff,
>
> My favorite SV12 enhancement is Java-style interface classes. As Dave 
> implies in his original paper 
> (http://bradpierce.files.wordpress.com/2010/03/multiple_inheritance_sv.pdf), 
> interface classes could be used to simplify the OVM TLM library code 
> as well as the OVM/VMM Interop library. My explanation of interface 
> classes aimed at those who are more familiar with SV modports than 
> Java is 
> http://bradpierce.wordpress.com/2013/02/16/sv12-interface-classes-think-of-them-as-next-gen-modports/ 
> .
>
> Parameterized functions are not actually an enhancement of SV12, but 
> they are first mentioned in the LRM in the SV12. They will be 
> important, too. Here's my advice on how to use them 
> http://bradpierce.wordpress.com/2013/04/20/sv12-deliver-parameterized-functions-with-let-expressions/ 
> .
>
> -- Brad
>
> *From:* owner-sv-bc@eda.org <mailto:owner-sv-bc@eda.org> 
> [mailto:owner-sv-bc@eda.org] *On Behalf Of *Bresticker, Shalom
> *Sent:* Wednesday, May 29, 2013 10:50 AM
> *To:* sv-ac@eda.org <mailto:sv-ac@eda.org>; sv-bc@eda.org 
> <mailto:sv-bc@eda.org>; sv-cc@eda.org <mailto:sv-cc@eda.org>; 
> sv-ec@eda.org <mailto:sv-ec@eda.org>; sv-dc@eda.org 
> <mailto:sv-dc@eda.org>; IEEE P1800 Working Group (ieee1800@eda.org 
> <mailto:ieee1800@eda.org>)
> *Cc:* Clifford E. Cummings (cliffc@sunburst-design.com 
> <mailto:cliffc@sunburst-design.com>)
> *Subject:* [sv-bc] FW: DAC Presentation of SV-2012 Enhancements - 
> Cliff requests your input
>
> Hi,
>
> Cliff Cummings asked me to forward this.
>
> Shalom
>
> *From:* Clifford E. Cummings [mailto:cliffc@sunburst-design.com]
> *Sent:* Wednesday, May 29, 2013 20:46
> *To:* Bresticker, Shalom
> *Subject:* DAC Presentation of SV-2012 Enhancements - Cliff requests 
> your input
>
> Hi, All -
>
> I have been asked to give a short SystemVerilog-2012 update 
> presentation at DAC. Stu Sutherland has already done a nice update 
> last year at DAC but I would like to take a slightly different 
> approach while sill acknowledging and referencing his DAC presentation.
>
> I would like to gather input from as many SystemVerilog-2012 committee 
> members as a I can regarding your favorite SystemVerilog-2012 
> enhancements. I would suggest that you email me with your five 
> favorite enhancements (feel free to send fewer or more than five 
> favorites).
>
> Everyone that sends me a small list of favorites will be acknowledged 
> and thanked in my presentation, which will eventually go into the 
> public domain and will also be posted on my web page.
>
> Time is short! All I need is a list of your favorite enhancements, 
> preferably by the end of day on Friday, but you get extra credit for 
> the following:
>
> (1) Why each enhancement is on your favorites list.
>
> (2) Any examples that show why the enhancement is cool!
>
> (3) Reference to specific section numbers of the IEEE 1800-2012 LRM.
>
> This is your chance to highlight enhancements that you as a committee 
> member felt was important to the Design and Verification community.
>
> Thanks in advance for you short (or extended) feedback.
>
> If anybody has a complete list of the enhancements that was compiled 
> separate from Stu's list, you get double-extra credit!
>
> Regards - Cliff
>
> -- 
> Cliff Cummings - Sunburst Design, Inc. 1639 E. 1320 S., Provo, UT 
> 84606 - 801-960-1996- cliffc@sunburst-design.com 
> <mailto:cliffc@sunburst-design.com> / www.sunburst-design.com 
> <http://www.sunburst-design.com> World Class Verilog, SystemVerilog & 
> OVM/UVM Training
>
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-- 
Cliff Cummings - Sunburst Design, Inc. 1639 E. 1320 S., Provo, UT 84606 
- 801-960-1996- cliffc@sunburst-design.com / www.sunburst-design.com 
World Class Verilog, SystemVerilog & OVM/UVM Training

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Received on Fri May 31 16:37:04 2013

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