[sv-ec] [sv-cc] SystemVerilog 3.1a and 1800-2005 remains in 1800-2012

 
Sorry, wrong Committee
 
Radek

  _____  

From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of Radoslaw
Nawrot
Sent: Thursday, October 10, 2013 2:01 PM
To: sv-ec@eda.org
Subject: [sv-ec] SystemVerilog 3.1a and 1800-2005 remains in 1800-2012


Hi,

39.5.1 Assertion system control

To control the assertion system, use vpi_control() with one of the following
constants and a second handle

argument that is either a vpiHandle for a scope or a vpiCollection of
handles for a list of scopes. A

NULL handle signifies that the control applies to all assertions regardless
of scope.

 
vpiCollection is part of 1800-2005  since 1800-2009 there is not vpi_create
so user cannot get vpiCollection
 
 
Regards,

Radek


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