SV-EC Meeting Minutes 16 December 2002 Active (At one or more of last 4 meetings) (-----a----aaaa) v Arturo Salz (Synopsys) (-----aa-aaaaaa) v Brad Pierce (Synopsys) (a-aaaa-aaa-aaa) v Cliff Cummings (Sunburst) (aaaaa-aaaa-aaa) v David Smith (Synopsys) (---aaa-a-aaaaa) v Francoise Martinolle (Cadence) (aaaaaaaaaaaa--) v Karen Pieper (Synopsys) (aaa-aaaaaaaaaa) v Kevin Cameron (National) (aaaapaaaaaaaaa) v Mehdi Mohtashemi (Synopsys) (-aaaaaaaa-aaaa) v Neil Korpusik (Sun) (-aaaaaaa-aaaaa) v Stefen Boyd (Boyd Technology, Inc.) (-aaa-a-aaaa---) n Dennis Brophy (ModelTech) (-----a-a-a-a--) n Tim Corcoran (WHDL) (------------aa) n Jay Lawrence (Cadence) (---------aa-a-) v Don Mills (LCDM Engineering) (--------aa-a-a) n Stu Sutherland (Sutherland-HDL) (---a-aa-----a-) n Kurt Takara (0-in) Inactive (Missed last 4 meetings) (--a-----------) n Adam Krolnik (LSI Logic) (---a-a--------) n Alec Stanculescu (Fintronic) (-aaa----------) n Dave Kelf (Co-Design) (aa-aa---------) n Heath Chambers (HMC) (--a--a-a------) n Michael McNamara (Verisity) (aaa-----------) n Paul Graham (Cadence) (aapaa---------) n Peter Flake (Co-Design) (a-------------) n Roy Armoni (Intel) (aapa-a--------) n Simon Davidmann (Co-Design) (aa---a--------) n Steven Sharp (Cadence) (-----a--------) n Stephen Meier (Synopsys) (-aaaaa--a-----) n Tom Fitzpatrick (Co-Design) (-----a--------) n Zeev Kirshenbaum (Verisity) a => Attended p => Attended by proxy - => Missed v => Eligible to vote at next meeting (based on attendance only) n => Not eligible to vote at next meeting (based on attendance only) Action Items: 1. Arturo: add information on string conversion (for implicit and explict casts) to section 3.13. 2. David: raise unicode issue with SV-BC and SV-CC (pass to SV-BC) 3. Arturo: provide builtin operator method section in Section 7. Set groundwork for builtin operator methods. Use guidelines discussed during meeting. 4. Mehdi: add examples for 3.8 5. Arturo: look at clarifying wording in CH-11 related to triggered and new syncrhonization object. Minutes taken by Stefen Boyd David - Note the Changes.html table. What is in here goes into the LRM Stefen - When are we trying to ... Stu - Everything sent directly will be ignored, will use table to create new LRM. Next version based on table state as of Jan 6. David - I was hoping to have new version by 6th. Stu - Will see if I can. Cut date will be 31 Dec. 2002. 1. Review minutes from the 9 December meeting and approve Proposed - David, Second Stu, approved unanimously 2. Review Action items (see minutes from 9 December meeting) 1) David to add indentification numbers to all issues: Complete 2) Arturo to look at implication of allowing reg assignment to string. Arturo - string type assignment to reg can be done with cast. Jay - Why do we need casting? This is not the spirit of Verilog. Mehdi - But this is a service to the user. Stefen & Cliff agreed with Jay Jay - I said the same thing in 1994... but I was beat up. Result of conversation was consensus that implicit cast allowed with implementation dependent support for warnings. In Section 3.7 example: REPLACE: b = r; // ERROR WITH: b = r; // OK (Some implementations may issue a warning) 3) Arturo to look into issue with removing unicode from char type. Arturo - Noted that this should be taken up by BC since making char 8 bits would make byte and char redundant. But CC wants to use char for C interface. 4) Arturo to write guidelines for use of system task vs method. Also to cover ability to leave parens off of method calls. Jay - Problem with methods is when they are on builtin types. Also doesn't like parens off methods because it affects the way compiling is done. Kevin - AMS would have been able to use method syntax. Jay - Instead of creating new $tasks, using methods that would be used for all builtin types would be better. Much discussion... Guideline changes: If a function can not be redefined, it should be a method. Drop Arturo's guideline #2, use method on builtin types as preferred. Updated method guidelines: 1) If a particular task is just a side-effect and operates on no specific data the it should be a $task Examples: $random, $reset, $finish, $stop, ... 2) Conversely, if a particular task applies only to as specific data type then it is best to use a method: Examples: associative_array.num , dynamic_array.size, and string.len 3) If a function can not be redefined, it should be a method. 4) Conversely, if a particular function should be replaced by a PLI call the a $task should be used, otherwise a method might be a better alternative. Examples: $random -> users should be allowed to replace with their own string.len -> users should not replace this (say $length) Paren usage: Mehdi - Easier to use without parens. Don't care. Stefen - Prefer to have style match verilog task usage. Since tasks don't require parens, methods should be the same. Concensus toward leaving parens off of method calls. 5) Arturo to provide better definition of replication operator in Table 3-2. Done and in Changes.html Proposal CH-8 approved 3. Review Enhancement status and proposals. Complete review of Random Constraints and approve Niel - Want to be able to create testbenches that run the same way every time. David - Main issue is constraint solvers. Stefen - Can we do simple algorithm to standardize with open door to enhancements? Jay - Is the way for users to compare results based on covering the exact same bit patterns, or comparing coverage? Will probably be coverage. Neil - Possibly have user write their own that can work with all tools. Jay - Unlikely that user would write own solver, but it might be a good idea to make standard interface through vpi to allow standard solver. Propose David - Accept incorporating random constraints into the LRM. Second Stefen, Kevin abstain, passed 4. Review LRM Proposal CH-8 approved (result of action item 5). Proposal CH-9 approved Section 3.9 Changes CH-11, CH-17 represent changes based on input and review. Arturo - Difference between wait and at are alien to verilog. Now have 'event bit' to create persistent event. David - How do we determine if event is static or dynamic. Arturo - No difference in declaration. Jay - Issue is if you can be sensitive to dynamically created elements. Arturo - Waiting on dynamic objects means evaluating object on which you wait and then waiting on contents. If pointer changes, then will wait on old pointed at locations. Arturo - Old event in Verilog was like a static label where you could statically evaluate the fanout. Can walk down array to see if someone is waiting. With new usage it's more like a queue where only those who are waiting will be triggered. Kevin - Now we're doing pointers and references. Now we can get into situations where events can be created that are impossible to debug. Jay - Looks like we know how many events we have, so there are limited number of events to keep track of. This is no different than sensitivity when you bring dynamic reg into sensitivity lists. Kevin - How about creating event class? Arturo - We started that way, but users want to assign a new event to a regular event. Kevin - I don't like mixing of static and dynamic. I want to be able to synthesize events. Proposal CH-11 accepted with clarification of wording to clarify meaning of an event declaration with no initializer and concept of permanently triggered. Section 3.10 Changes CH-12, CH-13, CH-14, CH-15 discussed as to intent of removing enumeration shorthand. Response was positive. Will add to LRM with expectation of immediate approval at next meeting. 5. Next Meeting David - Will meet next on Jan 6th. Quickly handle section 3.10 changes CH-12 through CH-15 and complete review of section 3.10. Goal for next meeting is to complete chapters 3 and 4. 6. Meeting closed