SystemVerilog Basic Committee all day meeting


Subject: SystemVerilog Basic Committee all day meeting
From: Karen Pieper (Karen.Pieper@synopsys.com)
Date: Wed Oct 09 2002 - 10:29:56 PDT


Hi, all!

        Peter is free on 11/15 to discuss interfaces and any other issues we need
his input on. I would
like to propose that we have an all day meeting here, hosted by Synopsys,
from 9am to 3pm Pacific
time. (Note this is the same week as ICCAD). Please let me know if this
is an issue.

Thanks,

Karen



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