Subject: [sv-bc] All Slides from the 28 February 2003 SV face-to-face.
From: Vassilios.Gerousis@Infineon.Com
Date: Sat Mar 01 2003 - 13:25:48 PST
Dear SV members,
I want to thank all SV Chairs (Chairs and Co-chairs) and experts who
presented (Arturo, Jay and Surrendra). Thanks for Sun for hosting the
meeting and for Neil, nice host. The slides includes committee status and
also technical updates. Two major tasks were completed (simulation
semantics and $root). A new task is established among to address few
assertion syntax to ensure compliance as well as being Verilog friendly. The
leader for of the task is David Rich and the volunteers are gathered among
the different committees. Details can be found in the minutes as well as in
the slides.
Please, I would like to bring to your attention, the detailed milestones
remaining for SystemVerilog 3.1 LRM standardization. This can be found as
slide 6 in SV-Meeting-February-2003.pdf. Your support to meet these
schedules is encouraged. The SV Chairs have done an excellent job getting us
to this state.
Best Regards
Vassilios
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Dr. Vassilios Gerousis
Chief Scientist
Infineon Technologies
DAT CS, MchB
D-81541 Munich
Germany
BalanSt. 73
Telephone: +49-89-234-21342
Fax: +49-89-234-23650
email: Vassilios.Gerousis@infineon.com
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