Subject: Re: [sv-ec] Re: [sv-bc] Re: Post 3.1
From: Karen Pieper (Karen.Pieper@synopsys.com)
Date: Fri May 09 2003 - 08:45:09 PDT
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>Date: Fri, 09 May 2003 12:19:58 +0200
>From: "Jonathan Bradford;Freiburg" <bradford@Micronas.com>
>Organization: Micronas Intermetall
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>CC: Kevin Cameron x3251 <Kevin.Cameron@nsc.com>, sv-bc@server.eda.org
>Subject: Re: [sv-ec] Re: [sv-bc] Re: Post 3.1
>References: <200305081730.h48HU5n18825@wallaby.nsc.com>
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>
>What about defining pragmas for backward compatability that apply over
>files / modules ?
>Then the syntax would be aware whether `bit', 'logic' etc were keywords
>or variables
>from 'older' code ?
>
>`verilog1995
>`verilog2000
>
>even for those stirring mixed signal flavours
>
>`verilogams
>
>These pragmas could also have meaning on the command line arguments
>for multi-pass compile/elaborate/sim invocations, but then they only
>apply to files,
>not individual modules and are of less help to the single pass sim
>invocations using -y
>scanning options etc.
>
>Just a simple suggestion.
>
> Jonathan Bradford
>
>
>Kevin Cameron x3251 wrote:
>
> > I previously posted suggesting that we could reduce the size of the
> > language and get better backward compatibility by reimplementing stuff
> > as typedefs in standard header files. It occured to me that you could
> > also do it by using pre-defined typedefs if you add an "untypedef"
> > capability. E.g. if you have bit & logic predefined (as per previous
> > discussion with Cliff) -
> >
> > typedef unresolved_bit bit;
> > typedef resolved_bit logic;
> >
> > - then you could do something like:
> >
> > untypedef bit;
> > untypedef logic;
> > `include "my_old_verilog.v" // old code using "bit" or "logic"
> >
> > You could consider "byte","short" & "int" as being:
> >
> > typedef signed unresolved_bit [7:0] byte;
> > typedef signed unresolved_bit [15:0] short;
> > typedef signed unresolved_bit [31:0] int;
> >
> > Just a thought,
> > Kev.
> > ----
> > National Semiconductor, Tel: (408) 721 3251
> > 2900 Semiconductor Drive, Mail Stop D3-500, Santa Clara, CA 95052-8090
>
>--
>
>________________________________________________________________________________
>
> /\ Jonathan Bradford mailto:bradford@micronas.com
> \/
> /\/\ MICRONAS GmbH http://www.micronas.com
> /\/\/\
> \/\/\/ Hans-Bunte-Str.19 Tel: +49 (0)761 517 2884
> \/\/ D-79108 Freiburg Fax: +49 (0)761 517 2880
> \/ Germany
>
>
>
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><!doctype html public "-//w3c//dtd html 4.0 transitional//en">
>
>
>What about defining pragmas for backward compatability that apply over
>files / modules ?
>Then the syntax would be aware whether `bit', 'logic' etc were keywords or
>variables
>from 'older' code ?
>
>`verilog1995
>`verilog2000
>
>even for those stirring mixed signal flavours
>
>`verilogams
>
>These pragmas could also have meaning on the command line arguments
>for multi-pass compile/elaborate/sim invocations, but then they only apply
>to files,
>not individual modules and are of less help to the single pass sim
>invocations using -y
>scanning options etc.
>
>Just a simple suggestion.
>
> Jonathan Bradford
>
>
>Kevin Cameron x3251 wrote:
>>I previously posted suggesting that we could reduce the size of the
>>language and get better backward compatibility by reimplementing stuff
>>as typedefs in standard header files. It occured to me that you could
>>also do it by using pre-defined typedefs if you add an "untypedef"
>>capability. E.g. if you have bit & logic predefined (as per previous
>>discussion with Cliff) -
>>
>> typedef unresolved_bit bit;
>> typedef resolved_bit logic;
>>
>>- then you could do something like:
>>
>> untypedef bit;
>> untypedef logic;
>> `include "my_old_verilog.v" // old code using "bit" or "logic"
>>
>>You could consider "byte","short" & "int" as being:
>>
>> typedef signed unresolved_bit [7:0] byte;
>> typedef signed unresolved_bit [15:0] short;
>> typedef signed unresolved_bit [31:0] int;
>>
>>Just a thought,
>>Kev.
>>----
>>National Semiconductor, Tel: (408) 721 3251
>>2900 Semiconductor Drive, Mail Stop D3-500, Santa Clara, CA 95052-8090
>
>
>--
>
>________________________________________________________________________________
>
> /\ Jonathan
> Bradford
> <mailto:bradford@micronas.com>mailto:bradford@micronas.com
> \/
> /\/\ MICRONAS
> GmbH <http://www.micronas.com>http://www.micronas.com
> /\/\/\
> \/\/\/ Hans-Bunte-Str.19 Tel: +49 (0)761 517 2884
> \/\/ D-79108 Freiburg Fax: +49 (0)761 517 2880
> \/ Germany
>--------------EDCD8724CEFA85C9DB40DC9D--
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