[sv-bc] SystemVerilog 3.1A Face to Face Meeting on September 18 starting at 9:00

Subject: [sv-bc] SystemVerilog 3.1A Face to Face Meeting on September 18 starting at 9:00
From: Vassilios.Gerousis@Infineon.Com
Date: Fri Aug 15 2003 - 02:24:24 PDT

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Hi SystemVerilog Members,
        We will have a face to face meeting in San Jose area on September
18. The meeting will have a limited seating. So please RSVP to save a seat
for you. The topics to be discussed in this meeting are:

a- Status of each SV committee.
b- Presentation on donations.
c- Status for LRM Errata.
d- Status of separate compile.
d- A kick meeting to discuss the technology aspects of SV Testbench
acceleration. If the results are promising, we may create another committee
to address such a capability.

A more detailed agenda, place for the meeting and conference call will be
sent soon.

Best Regards

Vassilios

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