RE: [sv-bc] Fwd: Cliff's SV-BC Enhancements for 2012

(11), on attrbitutes, can be associated with Mantis 1207 as well as 2122.

Shalom

________________________________
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Bresticker, Shalom
Sent: Friday, April 23, 2010 9:03 AM
To: sv-bc@eda.org
Subject: RE: [sv-bc] Fwd: Cliff's SV-BC Enhancements for 2012

Hi,

I tried to assoiciate Cliff's feature requests with Mantis items. This is what I found:

[SB] Mantis 2115
(1) X-Optimism/X-Pessimism resolution (slides 5-13)
[SB] Mantis 1956, 2119
(2) Connectivity checking (slides 14-19)
[SB] Mantis 2128
(3) Signed Operators (slides 20-23)
[SB] Mantis 2130
(4) Allow procedural assignments to net types (slides 24-28)
[SB] Mantis 2124
(5) `default_nettype logic (slides 29-30)
[SB] Mantis 2116
(6) Reproducible randomization of initial states (slide 32 - Cummings-Bening SNUG paper)
[SB] see Mantis 1290
(7) Always-assign race-removal (slide 33)

(8) Regular expressions using .* (Slide 34 - like Verilog EMACS mode)

(9) Remove 1-bit wire declaration requirement for .* (Slide 24)
[SB] Mantis 922 (10) ANSI style ports and parameters - allow either comma or semicolon separators (slide 36)
[SB] Mantis 2122 ? (11) Treat Verilog-2001 attributes like strings (slide 37)
[SB] Mantis 1062 (12) Fix UDP event scheduling for reg-UDPs (slide 37)
[SB] Mantis 1130 (13) Intentional bit-reversal usage (slide 37)
[SB] Mantis 2125 (14) NBA delay macro <=# (no slide but almost equivalent to <= #1 (can be turned off))

Shalom

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