[sv-bc] RE: SV-BC Top-25 Issues Posted - Please Read to Collaborate

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-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Mark Hartoog
Sent: Friday, May 07, 2010 5:25 PM
To: Maidment, Matthew R; sv-bc@eda.org
Subject: [sv-bc] RE: SV-BC Top-25 Issues Posted - Please Read to Collaborate

My Google account is markht, but it is not enabled to edit the spread sheet. Here are my top 25 priorities

1 row 47 - 3053 - Virtual interface and interface-port issues
2 row 48 - 3055 - Design construction issues
3 row 34 - 2310 - macros/Clarified Macro Semantics - Does not include enhancements from voting perspective
4 row 49 - 3056 - Master list of port issues
5 row 5 - 696 - Parameterized tasks, functions
6 row 11 - 1144 - Out-of-bounds array address
7 row 8 - 1067 - out-of-range or x/z index to array of reals (the item talks about much more than just reals)
8 row 39 - 2680 - Warning on out-of-bounds writes
9 row 13 - 1202 - define standard preprocessor
10 row 10 - 1084 - Logical Expressions in Macros
11 row 23 - 1563 - allow macro argument passing by name, like task/funcs
12 row 25 - 1697 - Macro Loops
13 row 46 - 3025 - Introduce elaboration-time function for type compatibility check
14 row 32 - 2270 - $bits issue
15 row 35 - 2503 - $bits issue
16 row 42 - 2896 - what is a "side effect"
17 row 46 - 3025 - Introduce elaboration-time function for type compatibility check
18 row 24 - 1566 - Variable number of task and function arguments
19 row 41 - 2832 - empty concatenations and zero-width part-selects
20 row 79 - n/a 5 - (5) `default_nettype logic (slides 29-30)
21 row 4 - 210 - Generate for module port definitions and instance port connections
22 row 6 - 898 - genvar inline declaration explanation
23 row 16 - 1350 - $ and $isunbounded issues
24 row 20 - 1523 - behavior of ?: on complex types
25 row 30 - 2167 - external naming of unamed sequential blocks

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