RE: [sv-bc] Expression size while processing 'inside' construct

Hi, see Mantis 1805 (http://www.eda-stds.org/mantis/view.php?id=1805).

Shalom

From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Surya Pratik Saha
Sent: Thursday, July 29, 2010 2:26 PM
To: sv-bc@eda.org
Cc: Utsab; Subhankar Ghosh
Subject: [sv-bc] Expression size while processing 'inside' construct

Hi,
We have a query regarding the size and sign handling of subexpression created while processing 'inside' construct.

Lets take a simple example:

bit [5:0] w
bit [3:0] x
bit [7:0] y
bit q;

 q = w inside {x, y};

 'inside' expr is processed as logical equality between w and x, w and y and finally reduction OR of the equality outputs:
  q = |((w == x), (w == y));

  The question is:
  Are operation (w == x) and (w == y) are self-determined or context-determined?
  If they're self-determined, while doing operation (w == x), x will be expanded to 6 bits.
  If they're context-determined, w and x would be expanded to 8 bit (max size is width of y).

Regards,
Surya

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