[sv-bc] Mantis 2114 on modports (from Jonathan)

-------- Original-Nachricht --------
Betreff: Re: interfaces & modports on sv-bc
Datum: Sun, 1 Aug 2010 21:33:39 +0100
Von: Jonathan Bromley <jonathan.bromley@verilab.com>
An: Kaiming Ho <kaiming.ho@iis.fraunhofer.de>
Referenzen: <4C1F9ED4.2020106@iis.fraunhofer.de>
<AANLkTikfrgruiHhRb2u1FXLPB76WpIrmLnmf8I2MCkQo@mail.gmail.com>
<4C44409E.2060707@iis.fraunhofer.de>
<AANLkTil1TS8rZfwER_OXlLRSoWdvbzD5mbp-ImcHihTO@mail.gmail.com>
<4C449094.9020203@iis.fraunhofer.de>

hi Kaiming

I'm still having some stupid IT-nonsense issues with posting to the
eda.org <http://eda.org>
mail reflectors, so I wonder if I could ask you to post something on my
behalf?

Last BC meeting I was asked to post some discussion material
on Mantis 2114 and I haven't yet done so. I have been very busy the
last two weeks, and also I'm ashamed to say I didn't take sufficiently
careful note of what I was asked to do at the last BC meeting, so it's
possible that the following isn't what was needed; if so, please
accept my apologies.

The key problem in 2114 is getting a model of what it means to have
an item in a modport with "output" direction, especially when multiple
module instances have ports connected to that modport. I'm also
seeking clarification of the significance of unused modports.

Here's an example I've already placed in Mantis 2114, with
a bit more discussion:

   interface I2;
     logic L;
     task T(input logic B);
       L = B;
     endtask
     modport RTL (output L);
     modport TB (import task T(input logic B));
   endinterface

As I said there, the intent is evident. Any given instance
of this interface will EITHER have an RTL module connected
to its modport RTL, driving modport.L procedurally, OR else
it will have a testbench module connected to modport TB
(possibly by virtual interface), driving L by calling task T.
Is this legal? Is it legal if the module connected to
modport RTL drives L from an always_XXX block or a
continuous assignment, and there is nothing at all
connected to modport TB? Is it legal in that situation,
but then at runtime some testbench calls task T
through a virtual interface?

Maybe the code is just statically illegal, regardless of
how it's used? That would be quite restrictive, limiting
the opportunities for creating interfaces with varied
modports to suit various applications.

Whatever the outcome, I hope you'll agree that the LRM
is not sufficiently precise about what it means to have
an unused modport, and what it means to have more
than one module port connected to a single modport.

Thanks

Jonathan Bromley

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