[sv-bc] RE: Simulation semantics of deferred assertions (Mantis 3206)

From: Arturo Salz <Arturo.Salz@synopsys.com>
Date: Fri Nov 05 2010 - 18:25:20 PDT

Dmitry,

If we allow assertions to drive new values into the design with zero delay then there is no bounded iteration limit that will guarantee that we have the final disposition of the assertions. So another disadvantage of option 2 is that in general it won't work. Another option would be to execute deferred assertions in the NBA-reactive region. Or, disallow driving values in the same time step from within a deferred assertion action blocks.

                Arturo

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Korchemny, Dmitry
Sent: Friday, November 05, 2010 5:24 PM
To: sv-ac@eda.org; sv-bc@eda.org
Subject: [sv-ac] Simulation semantics of deferred assertions (Mantis 3206)

Hi all,

Deferred assertions were designed to avoid simulation glitches. However simulation glitches are still possible when some of the assertion subexpressions are evaluated in the Active region and the others in the Reactive one. In this case the assertion matures twice: the first time when it reaches the Observed region for the first time, and the second time when it reaches it again upon the evaluation in the Reactive region. One such example is discussed in Mantis 3206 (http://www.eda-stds.org/mantis/file_download.php?file_id=4571&type=bug). This situation is going also to occur in checkers when the continuous assignments in checkers are introduced.

To address these problems the simulation semantics of deferred assertions should be changed. I can think of the following options:
1. Make assertions mature in the Postponed region instead of the Observed one. The advantage of this solution is its simplicity, the obvious disadvantage is the inability to change anything from the assertion action blocks.
2. Require deferred assertions to "make two full iterations through simulation regions", and make them mature only starting at the second visit in the Observed region. The advantages is the ability to change design variables from the assertion action blocks (e.g., to count), its disadvantage is performance penalty and more complicate simulation semantics.

What would you suggest?

Thanks,
Dmitry
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Received on Fri Nov 5 18:25:48 2010

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