[sv-bc] Bit/Part select of modport named argument

Hi,
I have a design like:
interface iface;
     logic [2:0] x;
     modport mport (input .j (x[1]));
endinterface

module top;
iface i ();
foo f (i.mport);
endmodule

module foo (iface.mport i);
     initial begin
         i.j[1] = 1; // Bit select of modport named argument
     end
endmodule

Is bit/part select of modport named argument allowed? I am also not sure
what is the meaning of that if it is allowed. Though some standard tools
do not give any meaningful error.

-- 
Regards
Surya
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