[sv-bc] Accessing internal interface signals as intfinstname.modportname.sig

Hi,

In my example

module M;

intf intfinst();

endmodule

interface intf;

signal s1;

signal s2;

modport M1(input s1);

modport M2(output s1,input s2);

modport M3(output s2);

endinterface

Now inside the module M I can access the signal of interface intf by
following ways

a) intfinst.s1

b) intfinst.M1.s1

My question is towards the difference between accessing the 'a' & 'b'.

Do the users mean that while accessing as intfinst.M1.s1, I am saying
that it has to be use as input only and is always a better way of
writing?

OR, they both are aliases and one should avoid writing 'b' as modports
based access should only be done when interface is passed as modport.
Also it is confusing if same signal is passed to different modports and
in the module M we are accessing same signal in different manner
intfinst.s1/intfinst.M1.s1/intfinst.M2.s1

Thanks,

Abhishek

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