[sv-bc] Variation of module port list

After today's discussion, I think it is worth exploring the use of
attributes. At present, I understand that there are no standardized
attributes, but there is no reason why there should not be some, in the same
way that there are standardized system tasks.

I suggest a standard attribute, remove_port_if_unused, to apply to port
declarations. This would have the effect of making it illegal to connect
externally to a port which is unused internally because of particular
parameter values and generate block execution.

This would fulfil the spirit of Mantis 210 "Some design styles at Freescale
would benefit from the ability to include or not include ports on a module
at elaboration time based on the value of a parameter or parameter override"
without making a language change.

I suggest that such removed ports should no longer be visible to the VPI and
VCD writer.

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