Ben Cohen has moved this issue from SV-AC to SV-BC.
Shalom
-----Original Message-----
From: Accellera Mantis Bug Tracker [mailto:mantis@eda.org]
Sent: Tuesday, June 14, 2011 7:39 PM
To: Bresticker, Shalom
Subject: [SystemVerilog P1800 0003595]: triggered sequence method needs clarification
The following issue has been UPDATED.
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http://www.eda-stds.org/svdb/view.php?id=3595
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Reported By: Ben Cohen
Assigned To:
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Project: SystemVerilog P1800
Issue ID: 3595
Category: SV-BC
Reproducibility: always
Severity: major
Priority: normal
Status: new
Type: Errata
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Date Submitted: 2011-06-03 15:52 PDT
Last Modified: 2011-06-14 09:38 PDT
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Summary: triggered sequence method needs clarification
Description:
P1800 is not clear on some possible usage and legality of the triggered
method.
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Issue History
Date Modified Username Field Change
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2011-06-03 15:52 Ben Cohen New Issue
2011-06-03 15:52 Ben Cohen File Added: triggered_legality.doc
2011-06-03 15:52 Ben Cohen Type => Errata
2011-06-03 15:52 Ben Cohen File Added: triggered_legality.pdf
2011-06-04 11:22 Shalom BrestickerIssue Monitored: Shalom Bresticker
2011-06-14 09:38 Ben Cohen Category SV-AC => SV-BC
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