RE: [sv-bc] nettype

I am trying to understand what you want to achieve.
Do you want to "redefine' the already predefined nettype "wire" and use its
predefined resolution for the logic datatype?

Francoise
    '

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Daniel Mlynek
Sent: Wednesday, November 30, 2011 3:09 AM
To: sv-bc@eda.org
Subject: [sv-bc] nettype

sv2012 adds nettype: mantis: 3398 . Extension define in this mantis add more possibilities but I was thinking about smth simpler.
Now I do not have a way to define smth like typedef on net_type to achieve declaration like:

typedef_net wire mynet;
typedef reg[3:0] mytype;
mynet mytype w;

mantis 3398 will also wont help me.

DANiel

--
This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.