[sv-bc] FW: SystemVerilog UVM WG request list

From: Maidment, Matthew R <matthew.r.maidment@intel.com>
Date: Wed Feb 25 2015 - 16:17:28 PST
SV-BC & SV-EC.

The UVM WG pulled together a detailed list of SV features desired.  I'm sending to the reflector.  Please review.
Will work to incorporate that into our overall feedback to the 1800WG.

Matt

>-----Original Message-----
>From: Alsop, Thomas R
>Sent: Wednesday, February 25, 2015 1:21 PM
>To: Maidment, Matthew R
>Subject: SystemVerilog UVM WG request list
>
>Matt,
>
>We spent over an hour discussing this SV request list in today's UVM WG.
>Attached is a rev1 list of items we want considered by the sv-bc and sv-
>ec groups.  We didn't get a chance to discuss all the items as we ran out
>of time but we went through and prioritized, justified the items, and
>categorized them by impact to the UVM BCL development effort.  I am going
>to solicit further feedback on our reflector so there will be some minor
>revisions.
>
>-Tom
>
>-----Original Message-----
>From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
>Maidment, Matthew R
>Sent: Tuesday, February 24, 2015 3:29 PM
>To: sv-bc@eda.org; sv-ec@eda.org
>Subject: [sv-bc] Agenda: SV-BC/SV-EC 1800 Scoping Meeting Feb 25 9-11am
>PST
>
>SV-BC/SV-EC 1800 Scoping Meeting
>Date: Feb 25, 2015
>Time: 09:00am-11:00am PST
>Join online: https://meet.intel.com/matthew.r.maidment/6F695NSL
>Join by Phone:
>US: +1(916)356-2663
>UK: +44 179340 2663
>Choose bridge 5.
>Conference ID: 702617185
>
>*       Roll Call (5 min)
>
>                2015
>Rep     Company Feb 18  Feb 25
>Matt Maidment   Intel   X
>Brad Pierce     Synopsys        X
>Ray Ryan        Mentor  X
>Jonathan Bromley        Verilab X
>Daniel Schostak ARM     X
>Mark Hartoog    Synopsys        X
>Neil Korpusik   Oracle  X
>Arturo Salz     Synopsys        X
>Shalom Bresticker       Intel   X
>Dave Rich       Mentor  X
>Francoise Martinolle    Cadence X
>Stu Sutherland  SutherlandHDL   X
>Sachin  Mentor  X
>
>*       Review Previous Meeting Notes (5 min)
>      http://www.eda.org/sv-bc/hm/11692.html
>      http://www.eda.org/sv-ec/hm/8568.html
>
>*       Patent Policy Reminder (5 min)
>      http://standards.ieee.org/board/pat/pat-slideset.ppt
>
>*       Mantis Review (60 min)
>      Review items marked for P1800-201X
>      http://tinyurl.com/q9jz7u9
>      for trends and try to summarize type and scope of interest.
>
>*       Continue capturing overall group summary (45 min)
>
>      From Feb 18 meeting:
>*       Consensus is to include for errata and clarification.  This could
>include minor enhancements for resolution.  Consensus from vendors and
>users.
>*       If there are major enhancements they should be done with
>sufficient contributors.  Asking for many enhancements to be implemented
>by limited number of committee members will not succeed.
>*       Would like to see global resolution of priority.  During 2012
>effort, BC and EC members were pulled into AC/DC work.  Would like to
>ensure that AC/DC or any other major initiative is properly scoped.
>Should consider impact of 1801, 1802, AC, AMS/DC, 1735 and others.
>*       Difficult to make recommendations without timeframe.  Timeframe
>would influence scope.  BC/EC should suggest timeframe and factor this
>into their proposal (short vs medium vs long)  From Karen:  "I suggest
>making an estimate of what it will take to do the work your team feels is
>necessary."
>
>
>
>--
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>


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Received on Wed Feb 25 16:17:59 2015

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