Re: [sv-bc] Interface issues

Yes. According to 12.8 of the SV 3.0 LRM or 18.12.5 of the SV 3.1A
draft LRM, "If the size and type of the port connection match
the size and type of a single instance port, the connection
shall be made to each instance in an array of instances.
If ..."

See page 285 in http://www.eda.org/sv/SystemVerilog_3.1a_draft5.pdf

To me the generalization from a single dimension to multiple dimensions
seems straightforward here.

-- Brad

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org]On Behalf Of
Steven Sharp
Sent: Monday, March 08, 2004 12:38 PM
To: sv-bc@eda.org; Brad.Pierce@synopsys.COM
Subject: Re: [sv-bc] Interface issues

>Any SystemVerilog array of instances, not just interface
>instances, can have multiple dimensions. See A.4.1.1.name_of_instance
>and also, SV 3.0 LRM, page 62.

And has the connection scheme for such a thing been specified?

Steven Sharp
sharp@cadence.com
Received on Mon Mar 8 13:02:25 2004