[sv-bc] SV_BC #26 - Enumerated Literals in Packages - Feedback Requested

Hi All -

With respect to BUG ID #26 - I am inclined to propose that importing
enumerated types with the same literal as existing or other imported
enumerate types shall be an error, but importing with the wildcard package
import is not necessarily an error. Examples attached.

If all agree, I will write up the proposal and include the attached examples.

Regards - Cliff

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Cliff Cummings - Sunburst Design, Inc.
14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
Expert Verilog, SystemVerilog, Synthesis and Verification Training