[sv-bc] Re: [P1800] SystemVerilog (P1800) and Verilog (P1364) Draft Documents Available

Hello members of the SV-* committees,

        Thanks to Stu, Shalom, and Dennis for getting the LRM drafts completed and posted for review. The schedule from here is very tight. Please review your respective segments of the draft changes to ensure that the changes were correctly incorporated into the LRM. We need to have any issues known by January 26, so that there is time for the P1800 to ratify needed changes and for the changes to make it into the voting draft due February 11.

        Each of the committees should appoint a reviewer for each issue owned by their committee in the "acknowledged" state. Those issues have been incorporated into these drafts of the LRM. As each of the items is reviewed, ones that are correct should be moved to the closed state. If there are any editorial issues found, please update the database to reflect the issue and mail the appropriate SV-* Chairs/Committees, Stu, Shalom, and Karen, so we can do what we can to address the issue quickly. Please note that I will be checking in with the Chairs very soon to work to get all acknowledged issues into the closed state.

        We recognize that the schedule is tight, and we appreciate each and everyone's efforts to ensure a timely, quality Ballot-ready LRM.

Thanks,

Karen
        

At 04:41 PM 1/17/2005 -0800, Brophy, Dennis wrote:
>TO: SystemVerilog and Verilog Technical Email Reflectors
>
>SUBJECT: Draft Documentation Available for Review
>
>The SystemVerilog Working Group members and Designated Representatives were notified today that the draft documentation for SystemVerilog and Verilog are available for download and review. At the moment, the downloads are available from eda.org. In the near future, all downloads of draft documents will move to the IEEE.
>
>In keeping with IEEE-SA staff directives to protect the intellectual property rights of the IEEE, these draft documents are password protected. In order to open them, you will need to get the password from the Designated Representative for your company.
>
>As a reminder, the SystemVerilog Working Group is entity based and manages both project 1800 and project 1364. If you are not an IEEE-SA Corporate member that has membership credentials in the SystemVerilog Working Group, you will need to make a request to Johny Srouji, the SystemVerilog Working Group chair for exemption from this policy. Attached you will find an email message template you can use to request such an exemption. Karen Pieper and I are copied on this message since Johny is in transition from one job to another and may be without email service from time-to-time during this review period. We will be able to contact him to get his approval during such periods.
>
>You can find the draft documents at:
>
>1364: <http://www.eda.org/sv-ieee1800/Specifications/1364-2005.D5.2004-01-13.pdf>http://www.eda.org/sv-ieee1800/Specifications/1364-2005.D5.2004-01-13.pdf
>1800: http://www.eda.org/sv-ieee1800/Specifications/P1800-draft3_2005-01-15.pdf
>
>Regards,
>
>Dennis
>Secretary, SystemVerilog Working Group
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>Cc: "Brophy, Dennis" <dennisb@Model.com>,
> <Karen.Pieper@synopsys.com>
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>Johny,
>
> Please send me a copy of the SystemVerilog and Verilog password to open the PDF files so I can review the specifications. I believe my comments will benefit the quality and content of the proposed standards.
>
>Thank you,
>
><Insert Your Name>
>
Received on Mon Jan 17 17:07:26 2005