Re: [sv-bc] FW: interpretation of priority if-else or case statement

Shalom,

I think your point 1, is generally true for tools like simulators. Unless
the values on all case branches are known at compile times, there is no way
(that I know of) for a synthesis compiler to build logic that can generate an
assertion when the design is running on a board. It is for this reason that
for synthesis compilers I believe that full_case and priority are the same.

> 
> There are many situations in which only a subset of possible cases are
> 'care' cases. In those situations, I could use 'full_case', but 'priority'
> would not be appropriate.

Unfortunately, Yes. To capture the true intention of the LRM, the synthesis
tool should now warn the user that synthesis and simulation results might be
different when using a "priority" case. :-)

- Krishna.