Re: [sv-bc] passing out-of-range element by reference

From: Brad Pierce <Brad.Pierce_at_.....>
Date: Fri May 13 2005 - 17:08:40 PDT
It couldn't just be any dummy element, but would need to be something
that is a no-op when written to and an x when read from.  To error
on the case you describe seems inconsistent with the rest of Verilog.

-- Brad

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org]On Behalf Of
Steven Sharp
Sent: Friday, May 13, 2005 4:13 PM
To: sv-bc@eda.org
Subject: [sv-bc] passing out-of-range element by reference


What happens if you pass an element of an array by reference, but the
index is out of range?  There is no such element to pass.  Is this a
run-time error?  Or is the simulator supposed to create a dummy element
to pass?

Steven Sharp
sharp@cadence.com
Received on Fri May 13 17:08:43 2005

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