Re: [sv-bc] Search order for functions/tasks in modules, $unit and packages

Steven Sharp writes:
>If you want to stick to the letter of the standard, then tasks and
functions >can't be used before being declared, exactly like parameters
and variables.

Yet 10.4.5 of the Verilog-2005 draft has an example of function use
before declaration.  And 10.2.2 has an example of task use before
declaration.

-- Brad