[sv-bc] Question on tagged union expression

Hi,
In P1800 draft 4 System Verilog LRM, for tagged union expression,

section 8.14, page no 73, it is mentioned:
"The type of a tagged union expression must be known from its context (e.g., it
is used in the right-hand side of an
assignment to a variable whose type is known, or it is has a cast, or it is used
inside another expression from
which its type is known)."

The part of sentence "it is has a cast" is not clear to me. It is a syntactically
wrong sentence. Please can someone help me what is the meaning of that, how a
tagged union expression can be used as cast.

Regards
Surya.