At 02:17 AM 11/8/2005, Bresticker, Shalom wrote: >However, the statement > >"The defparam statement is particularly useful for grouping >all of the >parameter value override assignments together in one module." > >is still true. This is Shalom's opinion and I disagree. I consider this to be one of the problems with defparams. This is one reason why Verilog compilers do not know the true values of any of the design parameters until the last file is read because the last file may change every single parameter in an entire design. This is why some companies have the policy "thou shalt not use defparams" because it makes it real hard to create Verilog-related internal tools. Another problem with all defparams in a separate file is that somebody may have put a defparam next to an instance and now the defparams are file-compile-order dependent, not to mention confusing to the engineer who does not understand why the defparam placed next to the file "did not work." IMO - parameters are constants that are local to a module. Handling local constants from a global file is an extremely dangerous practice. I would like to see a serious design that uses this technique to see if I could recommend a superior methodology. One technique that comes to mind is to include top-level parameter definitions and have them passed by named parameter passing to the lower-level modules. A second technique is to have a `defines file that is compiled first and used to assign parameter values that are then passed by named parameter passing. >Similar to the way we have lists of `defines. Also IMO - engineers use too many `define macros as opposed to parameters. I recommend that engineers use parameters first, and then convince themselves that they really need a globally visible and compile-order dependent macro definition. When using the `defines file, I recommend compiling this file first and treat the `defines like true global definitions. >Shalom Shalom and have had many spirited discussions on the topics of defparams, but I still think he's an okay guy! :-) :-) Regards - Cliff ---------------------------------------------------- Cliff Cummings - Sunburst Design, Inc. 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 Phone: 503-641-8446 / FAX: 503-641-8486 cliffc@sunburst-design.com / www.sunburst-design.com Expert Verilog, SystemVerilog, Synthesis and Verification TrainingReceived on Tue Nov 8 10:53:36 2005
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