[sv-bc] Re: [P1800] Re: [sv-cc] Fw: P1800 Approval Notification

Hi Vassilios,

I believe we all owe you a great part of this success. You have initiated 
and drove SystemVerilog from day one, including its early development 
under Accellera and later on, a solid SV3.1a donation into the IEEE.

I had the pleasure and honor to work w/ you on this great milestone and I 
appreciate it!

Thanks,

--- Johny.





Vassilios Gerousis <vgerousis@yahoo.com> 
Sent by: owner-ieee1800@eda.org
11/08/2005 09:03 PM

To
Johny Srouji/Austin/IBM@IBMUS, ieee1800@eda.org, sv-bc@eda.org, 
sv-cc@eda.org, sv-ec@eda.org, sv-ac@eda.org
cc
n.humenick@ieee.org, dennisb@model.com, Shrenik.Mehta@Sun.com
Subject
[P1800] Re: [sv-cc] Fw: P1800 Approval Notification






Congratulation everyone. This is really great by the
two team> It is great to see after four years of
working on SystemVerilog it is now an IEEE standard
and many EDA and user support. I want to thank Johny
for making this happen

--- Johny Srouji <srouji@us.ibm.com> wrote:

> Hi All,
> 
> This is the formal approval of the 1800 IEEE
> standard for SystemVerilog, 
> and I got a similar message for 1364 Verilog-2005.
> This was approved today 
> by the IEEE-SASB.
> 
> Congratulations to all and thanks for excellent job
> done! We still have 
> work ahead of us, but I believe this is a great
> achievement and milestone.
> 
> --- Johny.
> 
> 
> ----- Forwarded by Johny Srouji/Austin/IBM on
> 11/08/2005 05:27 PM -----
> 
> d.ringle@ieee.org 
> 11/08/2005 04:49 PM
> 
> To
> Johny Srouji/Austin/IBM@IBMUS
> cc
> Chuck AdamsJr/Armonk/IBM@IBMUS,
> peter@ashenden.com.au, s.vogel@ieee.org, 
> y.hosang@ieee.org, wolfgang.ecker@infineon.com,
> n.humenick@ieee.org
> Subject
> P1800 Approval Notification
> 
> 
> 
> 
> 
> 
> 8 November 2005
> 
> Johny Srouji
> IBM Corporation
> 11501 Burnet Road, Building 906
> Austin, TX  78758
> 
> cc:   Chuck Adams, CAG Chair
>          Peter Ashenden, C/DA Liaison
>          Sue Vogel, Manager-Technical Committee
> Programs
>          Yvette Ho Sang, Manager IEEE Standards
> Publishing
>          Infineon Technologies, Negative Balloter
> 
> RE: NEW P1800/D6 (CAG & C/DA) Standard for
> SystemVerilog: Unified Hardware
> Design, Specification and Verification Language
> 
> Dear Johny,
> 
> I am pleased to inform you that P1800 was approved
> as a new standard by 
> the
> IEEE-SA Standards Board on 8 November 2005.  A copy
> of the document will 
> be
> forwarded to the Standards Publications Department. 
> The editor assigned 
> to
> work on the project will contact you.
> 
> All IEEE standards shall be updated within five
> years of the date of
> publication.  If the standard is not revised,
> reaffirmed, or withdrawn
> within five years, the sponsor will be notified that
> it will be submitted
> to the Standards Board for administrative
> withdrawal.
> 
> It should be noted that any negative balloters have
> the right to appeal.
> Please consult the following web pages for
> information on this principle:
> 
> http://standards.ieee.org/guides/bylaws/index.html
> 
> http://standards.ieee.org/guides/opman/index.html
> 
> Please contact me if you have any questions prior to
> speaking with your
> editor.
> 
> Sincerely,
>
****************************************************************
> David L. Ringle
> Program Manager - Governance, Policy & Procedures
> IEEE Standards Activities Department
> 445 Hoes Lane
> P.O. Box 1331
> Piscataway, NJ  08855-1331
> TEL: +1 732 562 3806
> FAX: +1 732 875 0524
> d.ringle@ieee.org
>
****************************************************************
> 
> 



 
 
__________________________________ 
Yahoo! Mail - PC Magazine Editors' Choice 2005 
http://mail.yahoo.com