RE: [sv-bc] Function call without parenthesis

Uniform Access Princple.  Hmm...


This feature (that parenthesis on variable attribute access routines are
optional) is the very sad decision that makes use of variables named
len, next, first, prev, name et cetera presumably no longer backword
compatible to IEEE 1364.

One could have required the parenthesis, thereby clearly disambiguating
whether "f1.first" is selecting for the value of the register named
first in instance f1, or fetching the value of the first possible
enumeration value that an enum of the type that of f1 could legally
hold.  Consider:

module foo;

   reg [31:0] first, current, last, prev num;
   ...

endmodule

module bar(input clk);
  typedef enum { red, green, blue, yellow } Colors;
  Colors f2 = f2.first;
  foo f1 ();
  ...
  always @(clk) begin
      if (f1.first < f2.first ) begin
		...
      end
  end
endmodule

Is the above code illegal? Or is the compiler is supposed to figure out
that "f1.first" is a hierarchcial reference, where "f2.first" is an
attribute inquiry?  

I must say that a casual perusal of the code (as always, presume many
lines of text in the "..." areas) would confuse most folks when they
encountered the f1.first < f2.first line, and must guess which operand
might be a hierarchial reference, and which might be an attribute
inquiry function.

Michael McNamara
mcnamara@cadence.com
408-914-6808 work
408-348-7025 cell

-----Original Message-----
From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Brad
Pierce
Sent: Wednesday, December 14, 2005 9:21 AM
To: sv-bc@eda.org
Subject: Re: [sv-bc] Function call without parenthesis

As explained in

   http://eda.org/svdb/bug_view_page.php?bug_id=93

requiring a () in subroutine calls of no arguments would violate the
"Uniform Access Principle", which requires that syntax not distinguish
whether a property is stored or is computed on demand.

-- Brad

-----Original Message-----
From: Paul Graham [mailto:pgraham@cadence.com] 
Sent: Wednesday, December 14, 2005 8:45 AM
To: mcnamara@cadence.com
Cc: Brad.Pierce@synopsys.COM; sv-bc@eda.org
Subject: Re: [sv-bc] Function call without parenthesis

> So, I am trying to parse this.  Brad, you believe that the attribute
> inquiry methods may be invoked without the parenthesis?
> 
> Specifically, that "x = str.len;" is legal?

So why exactly do we want to allow vhdl-like syntax for
functions of no arguments?  It's a pain for the vhdl guys to
implement (or at least it was for me).  I understand that
for backwards compatibility we allow this for system
functions:

    x = $random;

but system functions and tasks are easy to recognize and 
don't pose the same problems.

I think verilog and its descendants should stick to the C
philosophy of "no cute syntax".

Paul