OK, so you changed it in 1364-2005 as well as 1800-2005. But that doesn't help answer any of these questions. You let fork/join in with the assumption that it would behave exactly like begin/end because of the other restrictions that apply to functions in Verilog. But now we have all the extensions in 1800, and that intent is lost. Dave ________________________________ From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Brad Pierce Sent: Wednesday, February 15, 2006 10:43 PM To: sv-ec@eda.org; sv-bc@eda.org Subject: Re: [sv-bc] Can a function contain a fork/join/any/none? Fork/join is legal in a function. See -- http://www.boydtechinc.com/btf/report/full_pr/276.html <http://www.boydtechinc.com/btf/report/full_pr/276.html> -- BradReceived on Wed Feb 15 23:15:20 2006
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