Re: [sv-bc] Iterating over arrayed and generated instances with 'foreach'

A couple of observations, following up (indirectly) to 

 

     http://www.eda.org/sv-bc/hm/3869.html

 

In SV2005, as in V2005, there are two ways to declare an indexed
collection of instances - arrays of instances and generate. 

 

SV2005 extends arrays of instances in two ways --

 

    1) Arrays of instances can be multidimensional.

 

    2) Arrays of (interface) instances can be connected to a port.

 

So in SV2005, arrays of instances are in some ways more powerful than
generate, because generate can't be used to declare a truly
multidimensional collection of instances or to declare a collection of
(interface) instances that can be connected to a port.

 

The root of the difference is that with generate, although each instance
in the indexed collection has a name, the collection itself has no name.
An individual generated (interface) instance can be connected to a port,
but, because there is no way to refer to the collection as a whole,
there is no way to connect that collection to a port.

Consider the following example from V2005::7.1.6

 

module driver (in, out, en);

input [3:0] in;

output [3:0] out;

input en;

bufif0 ar[3:0] (out, in, en);

endmodule

This creates a collection ar of four instances: ar[3], ar[2], ar[1] and
ar[0].

With generate one might instead write

 

module driver (in, out, en);

input [3:0] in;

output [3:0] out;

input en;

            for (genvar I = 3; I >= 0; I--) begin:GEN

bufif0 ar (out[I], in[I], en);

                        end

endmodule

This is not only more verbose, but the effect is to create an anonymous
collection of four instances: GEN[3].ar, GEN[2].ar, GEN[1].ar and
GEN[0].ar.

On the other hand, something you can do with generate that you can't do
with arrays of instances is to create a sparse collection.  For example,
the following declares two instances GEN[3].GEN_IF.ar and
GEN[1].GEN_IF.ar.

 

module driver (in, out, en);

input [3:0] in;

output [3:0] out;

input en;

            for (genvar I = 3; I >= 0; I--) begin:GEN

                        if (I%2 == 0) begin:GEN_IF

bufif0 ar (out[I], in[I], en);

                                    end

                        end

endmodule

 

-- Brad