RE: [sv-bc] how to access an interface parameter

That interface connection is made at the same time the modules
parameters are overridden; in the module instantiation declaration. As
long as there are no cyclical module or interface instantiations, there
can be no cyclical parameter overrides, and the elaboration order can be
well defined.

> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
Brad
> Pierce
> Sent: Wednesday, March 29, 2006 10:41 AM
> To: sv-bc@eda.org
> Subject: Re: [sv-bc] how to access an interface parameter
> 
> But you can't know the value of the interface parameter referred to
> across that port until an interface instance has been connected to the
> port.  So what's the practical difference?
> 
> -- Brad
> 
> -----Original Message-----
> From: Rich, Dave [mailto:Dave_Rich@mentor.com]
> Sent: Wednesday, March 29, 2006 10:38 AM
> To: Steven Sharp; Brad.Pierce@synopsys.COM; pgraham@cadence.com
> Cc: sv-bc@eda.org
> Subject: RE: [sv-bc] how to access an interface parameter
> 
> Steven,
> 
> I don't think anyone is suggesting that. We are saying that a
interface
> port reference is not a hierarchical reference.
> 
> > -----Original Message-----
> > From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
> Steven
> > Sharp
> > Sent: Wednesday, March 29, 2006 10:28 AM
> > To: Brad.Pierce@synopsys.com; pgraham@cadence.com
> > Cc: sv-bc@eda.org
> > Subject: Re: [sv-bc] how to access an interface parameter
> >
> > Hierarchical references are not allowed in constant expressions due
to
> > issues with elaboration order and circular dependencies.  Any change
> > should not be done lightly, but only after careful analysis of the
> > effects on all possible elaboration scenarios.
> >
> > Steven Sharp
> > sharp@cadence.com
>