Re: [sv-bc] part selects on arbitrary expressions

-----Non-member submission from Adam Krolnik-----

Hello All;

Dave Rich wrote:

typedef logic [1:8] t[5:2];

t[3][8]'(expr)

That means cast the expression to t, then take word 3, bit 8 of that
type.

Ahhh, I see;  we are using the phrase 'part select'  for  both part
selection of a vector and field/index selection from a type.

It is strange to see the field selection inline with the cast compared
with a postfix as in C and perl.  Postfix is definitely preferred.

Maybe this should be separated into two enhancements:
   1. Part selection of an expression (treated as a vector)
   2. Field/index selection of an expression cast to a named type.

It would be much clearer.


-- 
    Soli Deo Gloria
    Adam Krolnik
    Director of Design Verification
    VeriSilicon Inc.
    Plano TX. 75074
    Co-author "Assertion-Based Design"




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