Re: [sv-bc] RE: [sv-ec] overloading an assignment operator

From: Brad Pierce <Brad.Pierce_at_.....>
Date: Fri Apr 13 2007 - 11:45:49 PDT
     "I [...] read float as the built-in floating point type.
      But in Verilog, that is shortreal.
      The float type in the examples is a user-defined struct type."

It might be helpful then to change the name of this user-defined struct
type.

-- Brad

[ In reply to http://www.eda-stds.org/sv-bc/hm/5817.html .]

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Received on Fri Apr 13 11:46:08 2007

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