[sv-bc] a few more editorial notes

A few more editorial notes on Merged LRM Draft 2:

1.1: "- SystemVerilog refers to the extensions to the Verilog language (IEEE Std 1364) as defined in this standard" should be deleted. SystemVerilog is already defined above.


1.6: "Clause 10 describes continuous assignment" -> "assignments".


1.6: " Annex E (informative) describes compiler directives that are frequently used, but that are not required this standard." -> "required in".


3.3: " However, for the testbench, the emphasis is not in the hardware-level details" -> "emphasis is not on".


3.4: The interface is instantiated in a design can be connected" -> "and can be connected".


3.5: "This construct is provided for modeling timing-accurate digital circuits, commonly referred to a gate-level models." -> "as gate-level models". 


3.5: "The primitive construct and gate-level modeling is discussed more fully in Clause 27 through Clause 30." -> "are discussed".


3.6: "The full syntax and semantics of packages is described in Clause 25." -> "are described".


3.8: "The exact cross over from compilation to elaboration is left to 
the implementation." -> "cross-over".


3.8: "NOTE-throughout this standard, the terms compilation, compile and compiler often refer to the combined compilation and elaboration process." -> "Throughout".


3.8.1: "Access to the items in a compilation-unit scope can be accessed using the PLI" -> "The items in a compilation-unit scope can be accessed using the PLI".


3.9(a): "This is compatible with the definitions name space as defined in Verilog." - should be deleted.


7.6 says three times that a string literal can be assigned to a string type:

"String literals can also be assigned to variables of the string data type."
"A string literal can be assigned to a string type or an integral type."
"A string variable type or a string literal can be assigned directly to a string variable type."


11.5: "that are used to determine" -> "that determine".


Annex Q (Bibliography): Those standards which appear in Clause 2 (Normative References) should not re-appear in the Bibliography. Either-Or.


Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6852
+972 54 721-1033 

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