[sv-bc] 20.7.5 VCD SV type mappings

20.7.5 VCD SV type mappings, describes the mapping of some SV types to
Verilog types for VCD. This sub-clause appears at the very end of 20.7,
separated from all the rest of the VCD description. It should be merged
somewhere into 20.7.2, which describes the format of the VCD file.

Also, this section seems to be ambiguous about how nets with SV types
would appear.

Thanks,
Shalom

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6852
+972 54 721-1033


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