RE: [sv-bc] RE: [sv-ac] Interface item reference

From: Rich, Dave <Dave_Rich_at_.....>
Date: Tue Jul 24 2007 - 00:02:23 PDT
Your example is illegal because intf is not an instance name or an
upwards reference.

22.3.1 defines that there must be at least one top level module in a
design, and that top level name is the same as the module name. 22.4
defines when a nested module is implicitly instantiated. 23.3 defines
when a program block is implicitly instantiated.

There is no reference for where an interface is implicitly instantiated
because that functionality does not exist.

Dave


> -----Original Message-----
> From: Surya Pratik Saha [mailto:spsaha@cal.interrasystems.com]
> Sent: Monday, July 23, 2007 9:31 PM
> To: Rich, Dave
> Cc: Bresticker, Shalom; sv-bc@eda-stds.org
> Subject: Re: [sv-bc] RE: [sv-ac] Interface item reference
> 
> Hi,
> The answer of my original question is not yet answered. Also I did not
> get and LRM reference that module and program are implicitly
> instantiated, and interface is not.
> 
> Regards
> Surya
> 
> 
> 
> -------- Original Message  --------
> Subject: Re:[sv-bc] RE: [sv-ac] Interface item reference
> From: Rich, Dave <Dave_Rich@mentor.com>
> To: Bresticker, Shalom <shalom.bresticker@intel.com>, Surya Pratik
Saha
> <spsaha@cal.interrasystems.com>, sv-bc@eda-stds.org
<sv-bc@eda-stds.org>
> Date: Monday, July 23, 2007 11:39:44 PM
> > top-level interfaces are not implicitly instantiated. This was the
> > intent and the LRM does not suggest that they are. It only describes
> > implicit instantiation for modules and programs.
> >
> >
> >> -----Original Message-----
> >> From: owner-sv-bc@server.eda.org
[mailto:owner-sv-bc@server.eda.org]
> >>
> > On
> >
> >> Behalf Of Bresticker, Shalom
> >> Sent: Monday, July 16, 2007 9:29 PM
> >> To: Surya Pratik Saha; sv-bc@eda-stds.org
> >> Subject: [sv-bc] RE: [sv-ac] Interface item reference
> >>
> >> Mantis 1794 asks whether there is an implicit instance of an
> >> uninstantiated program or interface.
> >>
> >> Shalom
> >>
> >>
> >>> -----Original Message-----
> >>> From: owner-sv-ac@server.eda.org
> >>> [mailto:owner-sv-ac@server.eda.org] On Behalf Of Surya Pratik Saha
> >>> Sent: Tuesday, July 17, 2007 7:16 AM
> >>> To: sv-bc@eda-stds.org; sv-ac@eda-stds.org
> >>> Subject: [sv-ac] Interface item reference
> >>>
> >>> Hi,
> >>> Consider the following e.g.:
> >>>
> >>>       1 interface intf;
> >>>       2     int a;
> >>>       3 endinterface
> >>>       4
> >>>       5 module top;
> >>>       6     initial
> >>>       7         intf.a = 1;
> >>>       8 endmodule
> >>>
> >>> Is the hierarchical reference illegal? LRM does not clearly
> >>> mention that hierarchical reference of interface item can
> >>> only be possible by instantiation. Though most of the
> >>> standard simulators fail the case.
> >>>
> >>> --
> >>> Regards
> >>> Surya
> >>>
> >>>
> >>>
> >>>
> >>>
> >>> --
> >>> This message has been scanned for viruses and
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> >>>
> >>>
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> >>
> >
> >
> >
> >
> >
> >
> >
> 
> 
> 


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Received on Tue Jul 24 00:02:41 2007

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